Soft Co-Processor Based Hardware Acceleration for Image Blending
نویسندگان
چکیده
The speed of software algorithms can be greatly improved by using a co-processor to offload computations from the main processor. Multiple coprocessors can further increase the speed of a given algorithm. Based on this idea, three versions of an alpha blending algorithm were implemented on a NIOS II/f. The first implementation was entirely software based. This software based solution was then used as a baseline against which to test a single co-processor hardware solution and a multiple co-processor hardware solution. We showed that a single co-processor implementation achieved a speedup of 13.2 times, whereas the 2 co-processor solution achieved a speedup of 14.5 times with respect to this baseline. As further co-processors were added, the system became memory-bound as the algorithmic bottleneck moved from processing power to memory throughput.
منابع مشابه
Acceleration Framework using MicroBlaze Soft-core Processors on FPGAs
Offloading the complex computational kernel from the processor is the common way to improve performance of embedded system. In our work we are using MicroBlaze softcore processor in design and implementation of acceleration framework. In acceleration framework MicroBlaze is coupled with co-processor with the help of communication bus. We can attach the co-processor to our design that can handle...
متن کاملA Real-Time Marker-Based Visual Sensor Based on a FPGA and a Soft Core Processor
This paper introduces a real-time marker-based visual sensor architecture for mobile robot localization and navigation. A hardware acceleration architecture for post video processing system was implemented on a field-programmable gate array (FPGA). The pose calculation algorithm was implemented in a System on Chip (SoC) with an Altera Nios II soft-core processor. For every frame, single pass im...
متن کاملA Hardware/Software Co-Simulation Environment for Graphics Accelerator Development in ARM-Based SOCs
This paper focuses on the challenging aspects of developing a versatile hardware/software co-design and co-simulation environment for the development of 3D graphics hardware accelerators in ARM-based system-on-chip designs. The tool we propose integrates the ARMulator, the cycle-accurate instruction-level simulator for the ARM lowpower processor family, with an augmented open source SystemC mod...
متن کاملNios II Processor-Based Hardware/Software Co-Design of the JPEG2000 Standard
JPEG2000 is a recently standardized image compression algorithm that provides significant enhancements over the existing JPEG standard. JPEG2000 differs from widely used compression standards in that it relies on discrete wavelet transform (DWT) and uses embedded bit plane coding of the wavelet coefficients [1]. Due to the bit-oriented processing techniques used in the standard, full implementa...
متن کاملOn Current Strategies for Hardware Acceleration of Digital Image Restoration Filters
Two advanced design methodologies for hardware acceleration of a standard digital image restoration algorithm are explored and compared. The first one is the custom-designed hardware approach, leading to an application-specific integrated circuit (ASIC) implementation. The second one consists of the configurable processor approach, yielding a mixed hardware/software implementation running on a ...
متن کامل